S35D4M5

Main Features
  • Mature SiGe BiCMOS technology
  • Fully compatible with the 0.35µm base process licensed from TSMC
  • Integration of a Heterojunction Bipolar Transistor (HBT) module to adress high-speed applications
  • Gate density of 23k/mm²
Technology Characteristics
  • 0.35µm technology node
  • 200mm wafer size – Premstätten fab (Austria)
  • 31 masks
  • P-type substrate
  • Dual well
  • LOCOS isolation
  • 76A and 150A gate oxides
  • Epitaxial growth of SiGe layer to achieve high-speed bipolar transistors
  • Second poly layer for resistors and capacitors
  • 4 metal (Al) layers for interconnexion – thick top metal (2.8µm)
Device Characteristics
  • 3.3V and 5V operating voltages
  • 7 GHz max operating frequency
  • Qualified from -40°C to 125°C, for automotive and medical markets
  • Cut-off frequency of high-speed npn HBT : 65GHz (2.7V BVCEO)
  • Cut-off frequency of 5V npn HBT : 38GHz (5.5V BVCEO)
  • Lowest noise figure less than 0.6 dB @ 2GHz
  • High-resistive poly (1.2kohms/square)
  • Poly-insulator-poly capacitor (0.9fF/µm²)
  • Metal-insulator-metal capacitor (1.25fF/µm²)
  • High Q inductors and varactors

RAM, EEPROM and OTP memories (poly fuses) available on request

Wafer cross section for high speed and 5V HBT module

Prices

Prices are available on request

 

Contact

Design-Kit Content
Basic libraries:
  • Primitive devices
  • Primitive RF devices
  • Primitive ESD devices
Analog libraries:
  • Low-voltage analog standard cells
  • 4 metal analog power supply pads & analog I/O pads
  • 4 metal 3-bus analog power supply pads & analog I/O pads
  • Core-limited 4 metal 3-bus analog power supply pads & analog I/O pads
  • 4 metal RF pad library
  • 4 metal 3-bus, RF pad library
Digital libraries:
  • 3.3V digital standard core cells
  • Dense 3.3V digital standard core cells
  • 5V digital standard core cells
  • 3-bus 3.3V digital standard cells
  • Dense 3-bus 3.3V digital standard cells
  • 3-bus 5V digital standard core cells
  • 4 metal digital input/output/bidirectional buffers & power pads – 3.3V supply
  • 4 metal digital input/output/bidirectional buffers & power pads – 5V supply
  • 4 Metal 3-Bus digital input/output/bidirectional buffers & power pads – 3.3V supply
  • Core-limited 4 metal 3-bus digital input/output/bidirectional buffers & power pads – 3.3V supply
  • Core-limited 4 metal digital input/output/bidirectional buffers & power pads – 5V supply
CAD Tools
Cadence
  • Virtuoso ADE suite (design exploration and analysis)
  • Genus (physical synthesis)
  • Spectre (electrical simulation)
  • Xcelium (logic simulation)
  • Assura (physical verification)
  • Quantus (parasitic extraction)
  • Voltus (power analysis)
  • Innovus (digital implementation)
Siemens
  • Calibre (physical verification)
  • QuestaSim (logic simulation)
  • QuestaFormal (formal verification)
Synopsys
  • VTRAN (design exploration and analysis)
  • Design compiler (physical synthesis)
  • PrimeTime (static timing analysis)
  • HSpice (electrical simulation)
Usual application areas

Radio frequency (RF) and communication devices, high-speed digital circuits, signal processing, imaging and sensing systems, etc.

Run Dates

Only dedicated runs on request – no more MPW runs

Turnaround Time
  • 18 weeks from foundry tape-out to wafer fab-out
  • 5 additional weeks for dicing and packaging